Error Calculation
Industrial measurement of units rejected during testing despite meeting all functional specifications defines a specific type of waste in electronic assembly. The false failure yield loss occurs when inspection systems or test fixtures incorrectly identify a good board as defective. It represents a gap between the actual quality of the product and the reported yield from the production line.
This metric focuses on the accuracy of the verification process rather than the quality of the fabrication.
Inspection Impact
Overly sensitive automated optical inspection settings often trigger these incorrect rejections. The inspection impact of false failure yield loss forces boards into unnecessary rework loops or scrap piles. Technicians must manually verify every flagged defect to determine if the fault is real or a ghost image caused by shadows or component reflections.
High rates of these errors slow down the factory floor and hide genuine manufacturing problems.
Cost Implication
Financial consequences include increased labor and wasted materials. The cost implication of false failure yield loss is seen in the additional cycles required for troubleshooting and the reduction in total throughput. It lowers the overall efficiency of the assembly plant by consuming resources on units that were already compliant.
