Microvia Stress Mechanics under Reflow Temperature Profiles
Substrate Z-axis thermal expansion above Tg drives low-cycle fatigue and target pad separation in HDI microvias during SAC305 lead-free reflow profiles.
Inner Circuit Defect
Subsurface Anomaly
Structural discontinuities within the internal copper layers of a multilayer printed circuit board compromise electrical performance and reliability. An inner circuit defect consists of open circuits, short circuits, or laminate voids that occur before the individual layers are laminated together. These faults are trapped inside the core material during the pressing stage, making them impossible to repair once the board is fully cured.
Automated optical inspection of each internal layer prior to lamination is the primary method used to detect these anomalies.
Detection Method
High-resolution scanning systems scan each pattern of copper traces on the inner layers and compare the resulting digital representation with the electronic CAD design files. The scanner identifies line-width reductions, trace breaks, or copper splashes that would lead to failures after the lamination process is complete. If a defect is found on a panel, the manufacturer can either repair the individual layer before lamination or scrap the layer to avoid embedding a faulty layer in a completed board.
This pre-lamination screening prevents the waste of expensive materials and labor on boards that would fail final electrical testing.
Inspection Limit
Visual inspection cannot identify faults that occur during or after the lamination process. Once the layers are bonded, only electrical testing or industrial x-ray imaging can reveal the presence of an inner circuit defect. These final tests are slower and more expensive than the optical scans performed on the separate layers.