Queue Calculation
Station throughput represents the maximal throughput a rework station achieves during surface mount technology assembly, bounding the volume of corrective operations allowed on a single printed circuit board before scrap disposition occurs. Operators utilize this metric during manual population correction to schedule board flow past optical inspection gates. Production planners determine retouch bench capacity through time studies measuring manual component replacement duration against solder iron thermal recovery rates.
Board density governs this threshold because tightly spaced passive components increase bridge clearing time and restrict daily throughput. When circuit complexity rises, thermal dwell limits dictate maximum operator station output by enforcing mandatory cooling intervals between adjacent solder joints.
Throughput Variance
Rework line yield dictates how many assemblies clear corrective operations without sustaining thermal pad delamination or adjacent package damage. Automated optical inspection stations flag bridge defects that route specific lots into manual rework areas. Operators must balance iron temperature set points against trace lifting risks during fine pitch integrated circuit replacement.
Solder paste volume variation across printing stages increases subsequent touch up demands, directly compressing available station hours. Thermal profiling equipment verifies that preheat cycles protect surrounding laminate during prolonged component extraction.
Defect Density
Quality audit thresholds restrict total corrective interventions per panel to prevent cumulative laminate degradation under repeated thermal exposure. Visual inspection criteria define acceptable fillet geometry following manual joint reflow on complex circuit assemblies. Process engineers monitor first pass yield losses to identify recurring stencil printing errors that overload downstream repair queues.
When component skew exceeds assembly tolerances, manual alignment consumes available station capacity and slows overall line velocity. Factory acceptance testing catches residual flux contamination before finished circuit cards leave the final assembly floor.