Interface Hardware
Temporary electrical interfacing provides a high performance connection between individual dies on a silicon wafer and automated test equipment. A wafer sorting socket utilizes a dense array of micro-probes or pogo pins to contact the bond pads or bumps on the semiconductor surface. It enables the functional verification of each chip before the wafer is diced into separate components.
Operational Flow
Automated prober stations precisely align the socket with the wafer coordinates before contact. As the wafer sorting socket makes contact, it must apply enough force to break through native oxides without damaging the fragile circuitry of the die. Electrical signals pass through the socket to the tester to identify which units meet performance specifications and which are defective.
This sorting process generates a wafer map that guides the subsequent packaging and assembly steps. High frequency capability is maintained through short signal paths and controlled impedance within the socket body. Precise thermal control during this process ensures the chip is tested at its intended operating temperature.
Maintenance Cycle
Periodic cleaning and pin replacement are necessary to maintain low contact resistance over thousands of insertions. Wear on the contact tips eventually limits the accuracy of the measurements.
