False Call Rates That Decide Whether AOI Earns Its Place
AOI earns its place on an SMT line only when false calls stay below 200 PPM, preventing operator fatigue and protecting manual retouch benches from destroying good joints.
3d Phase Shift Moiré Profilometry
Phase Measurement
Optical metrology relies on projected fringe patterns to generate high-resolution topographical maps of manufactured surfaces. Specifically, 3d phase shift moiré profilometry projects multiple sinusoidal gratings onto a component, capturing interference fringes to calculate height variations across complex geometries. This optical inspection technique evaluates solder paste deposition and coplanarity on surface mount technology assemblies before reflow occurs.
Foreign particle contamination or warped circuit boards distort fringe patterns, causing phase calculation errors during automated optical testing. Automated inspection algorithms convert fringe distortion into height data, measuring coplanarity on fine-pitch ball grid array packages. Defective components trigger line stoppages when height profiles violate pre-established tolerance limits.
Manufacturers deploy this non-contact metrology method to catch bridging defects on fine-pitch integrated circuits during high-speed printing operations.
Calculation Algorithm
Mathematical processing converts distorted fringe patterns into absolute height values through arctangent calculations across multiple phase-shifted images. Sequential frame captures eliminate ambient lighting variations and surface reflectivity differences, isolating true topographical data from background noise. Processing units execute discrete Fourier transforms to extract wrapped phase maps from raw fringe images.
Software routines subsequently unwrap phase data, resolving 2pi ambiguities to construct continuous three-dimensional surface profiles. Hardware accelerators speed up matrix computations, allowing inline metrology systems to match the throughput of high-speed placement machines.
Tolerance Verification
Quality engineers establish strict acceptance criteria for height variance, warpage and coplanarity on incoming printed circuit boards. Measured profiles undergo comparison against computer-aided design models to verify dimensional compliance prior to component placement. Deviations beyond established thresholds signal stencil degradation or squeegee pressure anomalies during paste printing.
Closed-loop feedback systems transmit dimensional error data directly to upstream printers, initiating automatic adjustments to maintain deposit volume consistency. Height verification data correlates directly with solder joint reliability on completed assemblies, preventing field failures caused by insufficient intermetallic compound formation. Continuous process monitoring isolates mechanical wear in stencil fixtures before production yields drop.