High Aspect Ratio Blind via Reliability Limits under Sequential Thermal Cycling and Z-Axis Stress
High aspect ratio blind vias require low Z-CTE filled laminates and pulse plating to prevent target pad separation during lead-free thermal cycling.
Blind Via
Z-Axis Interconnect
Plated holes that provide electrical conductivity between an outer layer and one or more inner layers without penetrating the entire thickness of the printed circuit board define a specialized vertical interconnect class. A blind via connects the top or bottom surface to internal circuitry but remains invisible from the opposing side. This architecture allows for higher component density by freeing up routing space on the layers beneath the termination point.
IPC-6012 standards specify the quality requirements for these structures during fabrication.
Depth Control
Controlled depth drilling or sequential lamination enables the formation of these partial depth holes. The depth control of the blind via requires precise calibration of mechanical drill bits or laser energy settings to stop at a target internal copper pad. Laser ablation often replaces mechanical drilling when the hole diameter drops below 0.15 mm.
Proper registration ensures that the hole centers align with the internal landing pads.
Plating Aspect
Chemical deposition and electroplating must reach the bottom of a hole that has only one open end. The plating aspect of the blind via represents the ratio of the hole depth to its diameter. High aspect ratios increase the difficulty of fluid exchange within the hole during the plating process.
Air bubbles trapped at the bottom prevent copper coverage and lead to open circuits. Most fabricators limit this ratio to 1 to 1 to ensure reliable metallization across the entire surface of the internal pad.