Thermal Stress
Manufacturing phases that subject multi-layer circuit boards to temperatures far exceeding the glass transition temperature of the laminate resin test the mechanical integrity of internal copper connections. The occurrence of extreme lamination thermal excursions happens during multi-stage sequential lamination or double-sided assembly reflow cycles. It puts severe stress on plated through-holes, buried microvias, and internal copper interfaces as materials expand and contract.
This stress can cause copper barrel cracking, pad lifting, and delamination between the resin and fiberglass.
Resin Expansion
Out-of-plane thermal expansion of dielectric substrates during solder reflow or lamination cycles generates severe mechanical stress on copper vias. When boards undergo extreme lamination thermal excursions, the rapid change in volume of the resin exceeds the ductility of the copper plating. This mismatch causes micro-fractures to develop at the transition between the via barrel and the internal capture pad.
In sequential lamination of high-density boards, these cumulative cycles can result in latent open circuits that pass electrical test but fail during operation.
Defect Prevention
Material selection utilizing high thermal stability resins prevents structural failure of internal vias during successive pressing cycles. Specifying materials with high degradation temperatures and low coefficients of thermal expansion limits the damage during these cycles. It ensures that the multi-layer structure remains reliable after multiple thermal exposures.
