Fabric Density
The compression ratio applied to woven reinforcements determines how much resin the material can absorb during circuit board lamination. Glass fabric compaction describes the mechanical reduction of yarn thickness inside laminate prepregs under heated press cycles. Hydraulic platens exert controlled pressure to force air pockets out of the reinforcement matrix.
Adequate reduction ensures that woven yarn bundles flatten against adjacent layers without leaving voids that cause delamination during subsequent thermal shocks. Manufacturers measure this parameter by calculating thickness loss against unpressed yardage standards. Excessive force crushes individual filaments and breaks the glass strands, while insufficient pressure leaves excess resin pockets that warp dimensional stability.
Resin Distribution
Interstitial spacing relies entirely on proper yarn flattening during the lamination stage. Hydraulic pressure forces liquid epoxy into microscopic channels between individual strands. Uniform displacement prevents resin starvation at crossing points where warp and fill yarns overlap.
Ultrasonic scanning reveals trapped air pockets whenever the matrix experiences uneven pressure distribution across large panel formats. Technicians verify adequate consolidation by measuring dielectric breakdown voltages after thermal exposure. High pressure settings reduce final dielectric thickness, which alters characteristic impedance values in high frequency multilayer designs.
Layer Alignment
Precise positioning of compressed prepreg layers prevents internal twisting throughout high layer count fabrication. Mechanical alignment pins secure the material stack before thermal presses apply closing force. Shifting during compaction creates internal shear stresses that distort plated through holes during subsequent drilling operations.
Post lamination metrology verifies that glass bundle deformation remains symmetric around the neutral axis of the panel. Thermal cycling tests confirm that properly consolidated laminates withstand solder float temperatures without expanding beyond acceptable dimensional tolerances.