Quantifying Microstrip Phase Delay Variance Driven by Prepreg Glass Yarn Geometry
Prepreg glass bundle spacing causes local permittivity shifts that introduce picosecond phase delay variance in high-speed microstrip traces.
High Frequency Lamination
Dielectric Press
Polymeric substrates receive specialized prepregs containing woven glass reinforcement to manage high frequency lamination parameters during multilayer printed circuit board fabrication. Dielectric constants and dissipation factors vary across resin systems, requiring strict thermal press cycles to bond inner layers without trapping volatiles. Hydraulic presses apply uniform pressure profiles while elevated temperatures cure the resin matrix and lock in dimensional stability.
Microvia alignment depends directly on dimensional movement during this pressing stage, meaning thermal expansion rates dictate the allowable temperature ramp speed. Ultrasonic scanning inspects the finished panels for internal delamination and voids before outer layer patterning begins.
Resin Flow
Thermosetting polymers melt momentarily under heat before crosslinking permanently, creating the hydrodynamic pressure necessary to fill copper circuit gaps. Viscosity curves dictate the exact window where the material flows outward into cavity spaces without starving dielectric regions beneath heavy copper planes. Flow rates influence resin rich areas near circuit edges, which alter localized capacitance values if thickness deviates from nominal targets.
Automated viscometers measure uncured prepreg properties prior to production runs to verify that lot variations remain within acceptable processing margins. Excessive resin squeeze out causes edge bead formation that complicates subsequent mechanical trimming and edge plating steps.
Impedance Control
High frequency lamination determines trace width and height relationships that govern controlled impedance performance in radio frequency modules. Dielectric thickness directly dictates characteristic impedance values, requiring precise press closure tolerances to prevent signal reflections along transmission lines. Time domain reflectometry measurements verify that finished stripline and microstrip configurations meet specified ohm targets across broad frequency bands.
Dielectric breakdown voltage testing confirms that cured assemblies withstand operational voltage spikes without material degradation. Post cure dimensional shrinkage data feeds back into artwork compensation scaling factors to maintain precise line width geometry on subsequent manufacturing lots.