Differential Topology
Paired conductor traces carrying complementary equal-and-opposite voltage signals transmit high data rate digital streams across printed circuit boards. System designs implement high-speed differential serial nets to maintain signal integrity over backplanes, daughtercards and board-to-board connectors. This trace architecture excludes single-ended signal lines that rely on common ground returns.
Noise Immunity
Differential receivers detect the voltage difference between complementary signal paths rather than comparing a single trace voltage against a ground reference. Equal length routing of positive and negative trace pairs ensures that external electromagnetic noise couples equally into both conductors, canceling out at the receiver input. When high-speed differential serial nets encounter substrate fiber weave variations, local dielectric changes cause differential-to-common mode conversion and skew.
Tight intra-pair skew limits require serpentine routing adjustments to match physical trace lengths precisely across the layout. Impedance discontinuities along the differential pair created by component pads or layer transition vias generate unwanted signal reflections. Maintaining uniform edge-to-edge trace spacing along the entire route keeps differential impedance at target design values.
Routing Boundary
High data rate standards like PCIe and Ethernet depend on balanced differential signal transmission for reliable operation. Minor physical trace defects cause common mode noise, increasing unwanted electromagnetic radiation. Rigorous TDR testing verifies differential trace symmetry across fabricated circuit boards.
