Inner Layer Alignment Metrics under Anisotropic Thermal Lamination Shrinkage
Anisotropic inner layer shrink requires asymmetric artwork scaling factors matching prepreg warp and fill glass weave thermal coefficients.
Hole Breakout Tangency
Interconnection Limit
Drilled vias in a printed circuit board must reside within their designated terminal pads to ensure electrical continuity. Hole breakout tangency occurs when the circumference of the drilled hole shares a single common point with the outer boundary of the annular ring. This specific boundary represents the absolute limit where zero breakout exists without separating the pad from the trace.
Registration Accuracy
Drill wander and material shrinkage during lamination often cause slight deviations between layers. Although some design tolerances allow the hole to shift, maintaining hole breakout tangency avoids complete annular ring breakout. High-density interconnect designs require precise lamination press control to keep the stacked microvias centered.
Automated optical inspection verifies these drill patterns after the copper plating stage to ensure that the trace connections remain structurally sound.
Workmanship Standard
Industry specifications dictate the acceptable limits of ring breakout based on the performance class of the product. Achieving hole breakout tangency represents a strict threshold for Class 2 electronics, where partial breakout is permitted, but not for Class 3 boards. Fabricators measure the remaining copper thickness at the narrowest point of the connection using cross-section microscopy.
If the hole passes outside the pad edge, the trace connection can break during thermal cycling, leading to circuit failure. Implementing tight drill verification protocols prevents these expensive laminate rejects before final assembly.