Bench Top Spatial Magnetic Scanning for Circuit Layer Leakage Detection
Bench-top spatial magnetic scanning isolates subsurface circuit leakage paths non-destructively by mapping current-induced magnetic field profiles across PCB layers.
Lock in Amplification
Signal Extraction
Harmonic detection isolates minute voltage shifts during low-level resistance measurement on populated printed circuit boards. Lock in amplification extracts a target sinusoidal response from severe broadband noise by multiplying the composite input against a stable internal reference frequency. Phase sensitive detection eliminates quadrature components while passing only the in-phase signal across the low-pass filter stage.
Bandwidth reduction narrows the effective noise floor around the carrier frequency during micro-ohm thermal electromotive force compensation. Phase drift alters the measured amplitude if the reference signal lags behind the raw sensor output by an uncompensated offset angle.
Circuit Integration
Analog multipliers mix the incoming probe voltage with a square wave reference generated by the internal oscillator during surface mount continuity verification. Reference signals synchronize with the modulation chopping frequency applied to the excitation current source on the test fixture. Demodulation collapses the modulated alternating current signal back to direct current by shifting spectral energy down to zero hertz.
Post-demodulation filtering uses cascaded resistor-capacitor networks to strip away harmonic products and residual switching frequencies. Attenuation curves dictate the settling time required for stable voltage readings prior to analog-to-digital conversion.
Process Verification
Signal-to-noise ratio improvement allows automated optical and electrical testers to detect sub-millivolt drops across degraded solder joints without false rejections. Lock in amplification maintains measurement repeatability when electromagnetic interference from adjacent pick-and-place machinery floods the test fixture wiring. Calibration routines verify internal phase alignment against known standard resistors before every production shift begins.
Thermal noise dominates unshielded leads until synchronous demodulation suppresses uncorrelated fluctuations at the summing junction. Output voltage stability directly determines the minimum detectable defect size during automated micro-resistance profiling of high-density interconnects.