Radiographic Tomography
Failure analysis protocols for multi-layer circuit boards position high-resolution X-ray tomographic imaging as an advanced non-destructive inspection step. In semiconductor packaging and printed circuit board failure verification, micro-CT scanning constructs three-dimensional volumetric maps from rotational X-ray projections. The technology evaluates internal structural integrity, subsurface micro-cracking, and void distributions inside buried solder interconnects.
Physical sample dimensions bound the method, as large circuit panels attenuate lower energy X-rays and limit spatial resolution.
Volumetric Inspection
X-ray photon attenuation varies across copper traces and lead-free solder alloys. X-ray detectors capture hundreds of two-dimensional shadowgraphs as the specimen rotates through three hundred sixty degrees on a precision stage. Reconstruction algorithms synthesize these projection slices into a fully navigable three-dimensional digital model of the internal interconnect structures.
Engineers inspect internal micro-via target pads and trace delamination without sectioning the physical printed circuit board.
Analytical Resolution
Spatial resolution down to sub-micron scales enables precise identification of void volume percentages inside ball grid array solder spheres. Cross-sectional digital slicing isolates void locations across target interfaces, revealing interfacial intermetallic compound cracking. Inspection routines quantify void distribution percentages against IPC-A-610 standards without destroying valuable prototype hardware.
Contrast resolution degrades when dense metallic components shield surrounding dielectric materials, generating beam hardening artifacts that distort internal geometry reconstruction. The non-destructive nature of micro-CT scanning preserves physical evidence for subsequent mechanical cross-sectioning and physical shear testing.