Cross-Sectional Integrity
Metallographic preparation of printed circuit board coupons yields physical evidence of internal layer connectivity, plating thickness, and barrel voiding through destructive grinding and optical etching. Laboratories mount the excised sample in a thermoset epoxy resin, grind through planes of interest using progressively finer silicon carbide grit, and polish with diamond suspension until copper features are mirror-finished. Chemical etchants such as ammonium persulfate subsequently highlight grain structures, resin voids, and barrel anomalies under polarized light microscopy.
Destructive evaluation invalidates the coupon permanently, meaning the inspected specimen cannot return to production lines, yet no other verification method resolves buried microvia barrel cracks or inner layer annular ring separation with equivalent fidelity.
Plating Thickness Verification
Electrodeposited copper in plated through holes demands precise dimensional control to prevent thermal shock failure during reflow soldering. Inspectors measure barrel wall thickness at specified barrel locations, surface copper weight on external planes, and foil thickness reductions caused by over-etching. Thermal excursions during assembly induce z-axis expansion in FR4 substrates at rates exceeding fifty parts per million per degree Celsius, putting high tensile stress on copper barrels whose thickness falls below twenty micrometers.
Acceptance criteria derive from procurement standards governing Class three high-reliability hardware, which mandates a minimum copper thickness of twenty-five micrometers inside plated through holes to withstand multi-cycle thermal stress without barrel fatigue.
Resin Void Detection
Interlaminar voiding and resin starvation within multilayer laminate construction compromise dielectric isolation and dielectric withstand voltage during operational use. Micro-sections reveal resin starved regions where glass cloth bundles remain unbonded due to insufficient lamination pressure or improper heat ramp profiles during pressing cycles. Internal anomalies propagate moisture absorption paths that lead to conductive anodic filaments under continuous bias voltage.
Verification protocols establish acceptance limits for dielectric spacing between adjacent copper planes, ensuring that resin pocket dimensions do not violate minimum electrical clearance requirements defined in design documentation.