EMC Test Reports Voided by a Quiet Engineering Change
Unapproved component and layout modifications void baseline EMC reports, creating severe legal liability and immediate market surveillance recall exposure.
Microstrip Trace Impedance
Signal Propagation
High frequency signal transmission depends upon the relationship between the electromagnetic field geometry and the physical dimensions of a conductor situated above a reference ground plane. Microstrip trace impedance dictates the ratio of voltage to current along a copper transmission line during high speed switching events. Engineers specify this value to prevent signal reflection at load junctions where termination mismatches occur.
Fabrication houses calculate the required width of the copper path based on the dielectric constant of the laminate material and the thickness of the prepreg layers. Precise control over these geometry factors ensures that the characteristic impedance remains stable across the entire length of the signal path. Deviations in copper etch or laminate thickness shift the impedance away from the design target and degrade the integrity of the transmitted pulse.
Manufacturing Variance
Laminate suppliers report a tolerance range for the permittivity of the insulating substrates used during panel lamination. Chemical etching processes remove copper from the outer layers to form the trace geometry but often introduce undercutting that narrows the conductor profile. Measurements taken via time domain reflectometry confirm whether the resulting impedance falls within the specified range for the intended application.
Shops often adjust the design artwork to compensate for expected process drift in copper thickness. Narrower traces yield higher impedance values while wider geometries reduce the value for a fixed dielectric distance. Variations in the height of the reference plane also modify the field distribution and alter the measured result.
Performance Constraint
Signal integrity analysis requires verification of the impedance profile across the complete interconnect to satisfy timing requirements for serial buses. Assemblies must maintain controlled values when traces cross gaps or change layers through via structures. Discontinuities in the reference plane cause local impedance spikes that distort the signal waveform.
Designers implement return path stitching or copper pours to mitigate the effect of these reference discontinuities on the propagation velocity of the wavefront. Any mismatch between the transmission line and the load creates a reflected wave that interferes with the primary signal. Controlled impedance circuits provide the stability needed for high speed data throughput.