Structural Load
Mechanical forces act upon small plated through-holes in high-density interconnect circuit boards during thermal excursions. The study of microvia stress mechanics involves analyzing how thermal expansion mismatches between the copper plating and the dielectric substrate generate tension and shear forces. These stress fields concentrate at the corners of the copper deposit and at the interface between the microvia base and the target pad below it.
Uncontrolled stress leads to delamination or fracture of the joint, which disrupts the electrical connection between adjacent board layers.
Stress Distribution
Shear and tensile forces distribute unevenly through the microscopic hole structure as the board temperature fluctuates. The copper deposit has a low coefficient of thermal expansion, while the surrounding resin matrix expands rapidly when heated above its glass transition temperature. This difference forces the resin to push upward against the microvia flange while pulling the base of the microvia away from the underlying copper layer.
The resulting localized strain is highest at the sharp corners of the microvia, making these regions the primary sites for crack initiation. Engineers use finite element analysis to model these stress distributions and optimize the microvia aspect ratio to withstand these thermal cycles.
Mitigation Factor
Reducing the risk of microvia failure involves choosing dielectric materials with a high glass transition temperature and a low coefficient of thermal expansion. This material selection lowers the total strain experienced by the microvia during the soldering process and subsequent operation. In addition, increasing the thickness of the copper plating helps to distribute the stress more evenly across the microvia barrel.