Sub-Assembly Pressing
Multilayer circuit fabrication constructs sub-assemblies prior to final outer-layer panel lamination. Sub-stack lamination refers to the intermediate pressing process that bonds a subset of inner cores and prepregs into a unified structural unit containing buried via networks. High-layer-count backplanes and complex HDI designs utilize this modular manufacturing sequence.
Interconnect Processing
Complex printed circuit board architectures divide overall stackup designs into manageable multi-layer sub-units. Performing sub-stack lamination allows internal blind vias to be mechanically drilled and electroplated entirely through the sub-assembly prior to final panel integration. Sub-stacks undergo standard inner layer processing steps including etch, micro-etch, inspection, and optical target drilling.
Heat and pressure cycles fully cure the internal prepreg resin, creating a stable core unit for subsequent outer layer build-up steps. Layer registration accuracy within the sub-stack governs final multi-stack hole alignment precision. Planarization processes grind away exposed via copper caps to maintain a flat bonding surface for subsequent prepreg layers.
Structural Stress
Intermediate pressing steps introduce cumulative thermal history that can affect total board bow and twist. Controlling sub-stack lamination parameters balances resin flow vectors across symmetric layer arrangements. Mechanical testing verifies adhesion strength between laminated sub-assemblies and outer build-up foils.
Quality gates ensure sub-stacks meet dimensional tolerances before final press assembly.
