Defect Proportion
Manufacturing efficiency is evaluated by the ratio of defective unpopulated printed circuit boards that pass electrical testing without detection to the total number of processed units. A high bare-board escape rate indicates that the electrical test setup, such as a flying probe or fixtureless tester, is failing to resolve continuity or isolation faults. This fraction depends directly on the test coverage achieved during the bare-board phase.
Escape Mechanism
Escape routes exist when high-density interconnect features are not properly targeted by the test pins. Flying probe testers might miss microvias if the program does not include all node points. Inadequate test fixture pressure also leaves resistive shorts undetected.
Consequently, boards with latent faults proceed to the assembly stage.
Assembled Impact
Latent board failures become much more expensive to resolve once expensive integrated circuits are soldered onto the substrate. In-circuit testing of assembled boards can identify these issues, but rework costs rise by several orders of magnitude compared to sorting the board during bare-board inspection. High escape figures drive down the final yields of finished electronic assemblies.
Scrap rates increase for the assembly facility as a result. Contract manufacturers must therefore enforce strict screening parameters at the bare-board supplier stage to avoid absorbing these costs.
