Planar Dimension
Measurement of the vertical displacement of a conductive trace into the underlying dielectric substrate provides a baseline for evaluating planarization during board fabrication. Copper embedding depth represents the distance the metal foil penetrates below the nominal surface plane of the insulating laminate. This value determines the flatness of the outer layer for subsequent component mounting.
High pressure during lamination pushes the copper into the softened resin matrix.
Thermal Consequence
Subsequent assembly steps rely on a flat topography to prevent solder paste printing defects. When copper embedding depth is insufficient, raised circuit traces cause the squeegee to skip, leaving areas of thin deposition on adjacent pads. This surface irregularity increases the risk of solder bridging.
Conversely, excessive embedding reduces the copper cross section or disrupts layer spacing. In high-speed digital designs, the proximity of the embedded conductor to the underlying ground plane alters the characteristic impedance of the transmission line, resulting in signal reflections. Precise resin flow control ensures uniform surface flatness across the panel.
Fabrication Variance
Microsection analysis provides the primary means of measuring this characteristic after lamination. Operators examine cross sections under optical magnification to verify that the foil resides within the allowed tolerance band. Handled incorrectly, excessive lamination temperature degrades resin viscosity and causes uncontrolled sink.
Control of this parameter prevents impedance variations.
