Signal Skew
Geometrical variation during printed circuit board fabrication causes differential pair mismatch when etching tolerances alter the relative width or spacing of coupled copper traces. Manufacturing variations change the impedance profile along the length of a routed pair, producing unwanted reflections that degrade high speed digital data transmission. High frequency signals travel at velocities determined by dielectric constants and conductor geometries, so unequal trace lengths force propagated wavefronts to arrive out of phase at the receiving termination.
Automated optical inspection equipment measures conductor dimensions post etching to catch asymmetrical etching before lamination locks the layer stack permanently.
Propagation Delay
Photolithographic alignment errors during outer layer exposure introduce differential pair mismatch by shifting one conductor relative to its return path. Unequal propagation delays force fast edge rate signals to skew in time, generating common mode noise from the uncompensated high frequency energy conversion. Time domain reflectometry testing verifies impedance matching and transit times across the finished assembly, flagging boards that fail specified propagation limits.
Termination Tolerance
Surface mount component placement accuracy influences differential pair mismatch when discrete termination resistors or AC coupling capacitors exhibit excessive resistive variation across the net. Component value discrepancies alter the termination balance required to suppress signal reflections at the receiver input. Automated optical inspection verifies resistor placement and values after reflow soldering to ensure that electrical symmetry remains intact within the operational frequency band.