Buildup HDI Stackup Design and Layer Thickness Control
Stackup thickness control requires calculating pressed prepreg heights over local copper patterns to hold impedance and microvia drilling tolerances.
RMS Stackup Calculation
Statistical Estimation
Mathematical summation methods estimate overall height variation in printed circuit board laminate stackups by combining individual layer thickness tolerances statistically. Performing an RMS stackup calculation provides a realistic prediction of final board thickness variations compared to simple arithmetic worst-case additions. Output metrics ensure compliance with card edge connector tolerances and enclosure fitments.
Mathematical Derivation
Laminate thickness variations result from glass cloth weave variations and copper foil thickness tolerances. Summing maximum tolerance extremes arithmetically assumes every layer simultaneously reaches its upper or lower tolerance limit, producing an overly wide thickness band that drives unnecessary manufacturing constraints. Root-mean-square calculations take the square root of the sum of squared individual layer tolerances, assuming individual thickness variations are statistically independent and normally distributed.
The resulting standard deviation value predicts overall board thickness variation within confidence intervals such as three sigma. Calculating stackups using RMS methods allows designers to set tighter nominal specifications without suffering low fabrication yields. Deviations in dielectric thickness alter characteristic line impedance, making accurate stackup statistical modeling critical for controlled impedance boards.
Tolerance Compliance
Microsection measurement of finished board samples validates the RMS statistical model against actual layer thickness distributions. Final overall thickness measurements taken with micrometer gauges confirm compliance with IPC-6012 Class 3 physical requirements.