Conductor Spacing
Printed circuit board conductor density is bounded by the center-to-center distance separating adjacent copper lines on a given signal layer. The trace pitch equals the sum of individual line width and the air gap separation between adjacent conductors. High-density interconnect designs reduce center distances to route fine-pitch ball grid arrays and multi-pin active components within constrained form factors.
Electrical Limitation
Decreasing center-to-center conductor spacing increases mutual capacitive and inductive coupling between adjacent signal lines. Tight trace pitch creates signal crosstalk that degrades noise margins in high-speed digital buses unless differential routing or ground shielding is applied. Voltage breakdown risks increase as conductor air gaps narrow, requiring protective conformal coating or higher dielectric breakdown strength laminates.
Etching tight line spacing requires ultra-thin copper foils to prevent over-etching and trace undercut during chemical fabrication steps. Controlled impedance formulas rely on strict maintenance of line width and spacing dimensions across long trace runs.
Processing Tolerance
Fabrication facilities enforce minimum spacing limits based on imaging resolution, copper foil thickness and etching chemistry capabilities. Direct imaging equipment achieves finer trace pitch tolerances than photolithographic film exposure methods. Automatic optical inspection systems verify conductor gaps against Gerber design rules before inner layer lamination.
