Quantifying Time Domain Reflectometry Discontinuities from Side Edge Undercut Variations
TDR discontinuity spikes from undercut are quantified by mapping trapezoidal trace profile ratios to TDR reflection peaks filtered at matched rise times.

Profile
Subtractive chemical etching dissolves unprotected copper through liquid jet impingement, leaving trapezoidal conductor edges along printed circuit traces. Liquid etchant breaks resist lines. Chemical processing creates a lateral erosion effect known as side edge undercut.
The ratio between the vertical etch depth and the lateral reduction beneath the photoresist mask defines the etch factor. When spray nozzle pressure, bath temperature, or specific gravity fluctuate across a production run, the horizontal undercut dimension varies dynamically. Base copper thickness sets the baseline.
These geometric shifts alter the conductor cross section from an ideal rectangle into a variable trapezoid, directly modulating the localized cross-sectional area and the spacing between adjacent conductors.

Subtractive Fluid Mechanics and Undercut Physics
Cupric chloride spray nozzles discharge liquid across copper foil, producing localized fluid stagnation near photoresist boundaries. The top surface of the trace remains exposed to fresh etchant longer than the base, causing the conductor top width to shrink at a faster rate than the bottom contact width. Higher etch factors yield nearly vertical sidewalls, whereas lower etch factors produce pronounced trapezoidal sloping.
Fabrication lines operating with thin half-ounce foil exhibit less total lateral undercut than thick two-ounce copper panels, but percentage variations in trace width remain high when fine line widths drop below 75 micrometers. Side edge undercut is rarely uniform across a single panel. Fluid puddle effects in the center of broad panels slow chemical replenishment, creating a systematic differential between outer edge trace profiles and central board geometries.
When side edge undercut narrows the conductor apex without reducing base contact, distributed capacitance drops while loop inductance rises.
Process engineers track edge profile variations by evaluating the differential between top trace width and bottom trace width. As side undercut increases, the top width contracts while the bottom width remains constrained by substrate adhesion. This differential reshapes the surrounding electromagnetic field distribution.
The concentrated electric field near the sharp upper corners weakens, shifting field lines toward the broader base. In coupled differential pairs, undercut alters the edge-to-edge dielectric gap along the upper half of the trace height, modifying mutual capacitance without altering the nominal baseline pitch measured at the foil surface.

Trapezoidal Conductor Geometry Variables
Etch factor measures the ratio of vertical copper depth to horizontal undercut beneath the resist mask. A line with zero undercut would exhibit a perfectly vertical wall, corresponding to an infinite etch factor. Commercial subtractive processes typically achieve etch factors between 1.5 and 4.0 depending on copper weight, etchant chemistry, and equipment architecture.
Variations in spray manifold oscillation produce periodic localized undercut waves along the signal path, creating small electrical discontinuities at physical intervals matching nozzle spacing.
- Apex width reduction decreases total conductor cross-sectional area and raises effective high-frequency series resistance through enhanced skin effect concentration.
- Base trace width preserves mechanical bonding area with the underlying dielectric substrate while anchoring low-frequency capacitance calculations.
- Sidewall slope angle alters edge-coupling geometry in tightly spaced differential traces, shifting odd-mode characteristic impedance.
- Etch factor variance introduces spatial non-uniformity in line impedance along extended routing runs, acting as a distributed reflection source.
Quantifying these structural changes requires mapping physical dimensions directly to transmission line parameters. Table 1 demonstrates how incremental changes in side edge undercut convert into characteristic impedance deviations across single-ended microstrip and differential stripline configurations on standard FR-4 dielectric substrates.
| Base Width (um) | Foil Thickness (um) | Side Undercut (um) | Etch Factor | Microstrip Z0 (ohms) | Differential Zdiff (ohms) |
|---|---|---|---|---|---|
| 125 | 35 | 5.0 | 3.50 | 50.2 | 100.4 |
| 125 | 35 | 8.0 | 2.18 | 51.3 | 102.1 |
| 125 | 35 | 12.0 | 1.46 | 52.8 | 104.5 |
| 100 | 18 | 3.0 | 3.00 | 50.1 | 100.2 |
| 100 | 18 | 6.0 | 1.50 | 51.8 | 103.0 |
| 100 | 18 | 9.0 | 1.00 | 53.6 | 105.8 |
Fabricators frequently claim that cross-sectional trace trapezoid variations remain within standard microsection tolerance limits even when localized TDR impedance reflections breach system signal integrity budgets.
Reflection
High-speed step pulses propagating down a printed transmission line respond directly to spatial shifts in characteristic impedance. Localized variations in trace cross section alter distributed capacitance and inductance per unit length. When a fast-rising voltage step encounters an undercut section, the instantaneous impedance shift forces a fraction of the incident wave energy back toward the generator.
The voltage wave reflects back. Time Domain Reflectometry measures the amplitude and time delay of these returned pulses to construct a spatial profile of line impedance along the conductor path.

Electrodynamics of Local Impedance Shifts
Voltage wave propagation along a uniform line depends on distributed capacitance and inductance per unit length. The characteristic impedance equals the square root of distributed inductance divided by distributed capacitance. Side edge undercut reduces trace top width, which decreases unit-length capacitance to the reference plane.
Simultaneously, the smaller cross-sectional area increases unit-length loop inductance. Both physical mechanisms drive local characteristic impedance higher. The reflection coefficient at the transition boundary equals the difference between the shifted impedance and the nominal impedance divided by their sum.
An etch factor reduction from 3.0 to 1.5 decreases microstrip characteristic impedance by 4.2 ohms on a 100-micrometer base copper line.
When the undercut region spans a physical length shorter than the spatial width of the TDR stimulus pulse, the observed reflection amplitude does not reach the true local characteristic impedance. The reflectometer acts as a spatial low-pass filter. Short rise times expose fine defects.
A localized etch notch or puddle anomaly appears as a blunted reflection peak whose magnitude depends heavily on the test instrument rise time rather than the full magnitude of the physical defect alone.
Spatial Resolution Limits in TDR Measurements
Pulse rise time determines the minimum physical distance over which an impedance discontinuity can be fully resolved. The spatial resolution limit equals half the pulse propagation velocity multiplied by the 10-90 percent rise time of the TDR step step input. In standard FR-4 dielectric materials, signal velocity approximates 150 micrometers per picosecond.
A reflectometer operating with a 35-picosecond rise time achieves a spatial resolution limit near 2.6 millimeters. Any side undercut variation occurring over a physical length shorter than 2.6 millimeters becomes spatially integrated by the pulse, presenting a reduced reflection voltage spike.
- Incident pulse rise time sets the minimum spatial window for detecting isolated side edge undercut anomalies.
- Propagation velocity scales the physical length of the electrical pulse within the dielectric medium.
- Spatial low-pass filtering attenuates peak reflection amplitude for short localized undercut defects.
- Integrated reflection area preserves total energy quantity, allowing capacitive or inductive lump-element modeling of narrow undercut regions.
Spatial filtering influences the measured reflection coefficient. Table 2 details how varying the TDR system rise time alters the observed impedance discontinuity amplitude for a fixed localized undercut defect measuring 1.0 millimeter in physical length.
| TDR Rise Time (ps) | Effective Spatial Resolution (mm) | True Local Z0 (ohms) | Observed Peak Z0 (ohms) | Observed Reflection Coefficient |
|---|---|---|---|---|
| 10 | 0.78 | 54.5 | 54.2 | 0.0403 |
| 20 | 1.55 | 54.5 | 52.8 | 0.0272 |
| 35 | 2.71 | 54.5 | 51.4 | 0.0138 |
| 50 | 3.88 | 54.5 | 50.8 | 0.0079 |
| 100 | 7.75 | 54.5 | 50.2 | 0.0020 |
Whether ultra-fast TDR pulser rise times can reliably distinguish between dielectric roughness and localized side undercut without introducing unmanageable probe contact noise remains an active debate among signal integrity engineers.

Trace
Test coupon geometries placed on panel margins serve as the primary electrical proxy for internal signal routing. Verification fixtures connect to these standardized structures using specialized high-frequency probes. However, differences between coupon edge fluid exposure and dense internal signal routing often introduce systematic measurement offsets.
The launcher interface, probe pitch, and coupon launch pad transitions contribute parasitic capacitance and inductance that overlay the raw TDR step response, obscuring minor undercut discontinuities near the start of the line.

Which Filter Settings Isolate Under-Etch Discontinuities?
Standardized testing per IPC-TM-650 Method 2.5.5.7 specifies filtering parameters to balance high-frequency probe noise against spatial accuracy. Setting an excessively fast rise time introduces high-frequency ripple from launcher pad transitions, obscuring genuine trace profile variations. Conversely, over-filtering smooths away true impedance spikes caused by localized side undercut.
The standard mandates mathematical filtering of the raw step input to produce a controlled Gaussian or Bessel response, usually normalized to 35 picoseconds or 20 picoseconds for high-bandwidth applications.
Time domain reflectometers smooth impedance dips over short physical distances when the stimulus pulse rise time exceeds trace propagation delay across the defect.
Correct interpretation requires separating continuous trace impedance from localized point discontinuities. Continuous undercut shifts trace impedance across its entire length, moving the baseline level up or down. Localized undercut variations—such as those caused by transient resist lifting or localized spray blockage—appear as sharp reflection peaks superimposed on the baseline.
Evaluating these peaks requires calibrating out the probe launch artifact using time-gating techniques or reference baseline subtraction.

Worked Sensitivity Analysis for Edge Variances
Consider a 50-ohm single-ended surface microstrip constructed on a 100-micrometer outer-layer copper foil over an FR-4 dielectric substrate with a relative permittivity of 4.0. The nominal target trace exhibits a bottom width of 150 micrometers and a top width of 125 micrometers, yielding a 12.5-micrometer side undercut per edge with an etch factor of 1.40. The calculated baseline characteristic impedance equals 50.0 ohms.
Coupon launchers introduce parasitic inductance.
Assume process instability increases the side undercut by 10 micrometers per edge over a localized 1.0-millimeter trace segment, shrinking the top width to 105 micrometers and reducing the bottom width to 140 micrometers. The effective trace cross-sectional width drops from 137.5 micrometers to 122.5 micrometers. Re-calculating the 2D boundary element electrodynamic model demonstrates that this localized cross-sectional narrowing increases local characteristic impedance to 53.2 ohms, producing an actual unattenuated reflection coefficient of 0.0310 (3.10 percent).
The signal propagation speed within this substrate structure equals 155 millimeters per nanosecond. The double-transit time across the 1.0-millimeter physical defect length equals 12.9 picoseconds. When evaluated with a TDR stimulus pulse filtered to a 35-picosecond rise time per IPC-TM-650 Method 2.5.5.7, the instrument spatial transfer function scales the peak response by the ratio of defect double-transit time to stimulus rise time.
The observed reflection coefficient peak reaches approximately 0.0114 (1.14 percent), corresponding to an apparent observed impedance spike of only 51.15 ohms. If the same physical defect is evaluated using an unfiltered 15-picosecond pulser rise time, the observed reflection coefficient reaches 0.0267 (2.67 percent), displaying an apparent impedance peak of 52.74 ohms. This calculation proves that stimulus rise time controls the observed magnitude of side undercut discontinuities.
- Connect the high-frequency TDR probe to a precision 50-ohm calibration standard and record the system reference step response.
- Apply probe contact to the test coupon launcher pads under controlled vertical force to maintain constant probe tip inductance.
- Acquire the raw time-domain reflection waveform across the designated coupon trace length using a minimum 10-gigahertz real-time bandwidth.
- Apply a digital filter to establish a normalized Gaussian rise time of 35 picoseconds in accordance with IPC-TM-650 Method 2.5.5.7.
- Perform time-gating to exclude the initial launch pad parasitic reflection window from the baseline calculation area.
- Extract the continuous average line impedance along the central 70 percent segment of the coupon trace path.
- Calculate peak-to-peak impedance delta values for localized discontinuities exceeding twice the spatial filter window length.
A TDR measurement filtered at too slow a rise time smooths away dangerous localized impedance spikes while a measurement filtered too fast turns harmless edge roughness into expensive false alarms.

Margin
Process variation in chemical etching requires defined guardband thresholds to prevent out-of-spec product from reaching assembly lines. Test instruments carry inherent measurement uncertainties, including oscilloscope vertical resolution limits, cable attenuation, probe contact resistance, and thermal drift. When test specifications dictate a strict impedance limit of plus or minus 5 ohms around a 50-ohm nominal target, uncalibrated side edge undercut variations can consume the entire error budget before material dielectrics or copper thickness tolerances are accounted for.

Guardbanding against Process Drift
Statistical tolerance budgeting allocates allowable variance across substrate dielectric constant, copper thickness, and side undercut. Fabricators who fail to guardband their TDR pass/fail limits risk shipping non-compliant boards or falsely rejecting acceptable production lots. Impedance shifts follow geometry.
A robust guardbanding protocol narrows the internal factory acceptance limits relative to the customer specification limits, absorbing measurement system uncertainty and localized undercut variations.
IPC-6012E Class 3 permits a maximum 20 percent reduction in nominal trace width, but uncalibrated edge undercut can breach the tight 50-ohm tolerance threshold before bulk width limits are reached.
Calculating the correct guardband setting requires combining instrument uncertainty with process capability statistics. If a TDR test system exhibits an expanded measurement uncertainty of 1.2 ohms at a 95 percent confidence level, the factory acceptance window for a 50 ohm plus or minus 5.0 ohm customer specification must tighten to 50 ohm plus or minus 3.8 ohms. Side undercut drift that pushes the true board impedance to 54.5 ohms will register as 55.7 ohms on an upper-bound measurement, triggering an immediate batch hold before out-of-spec panels enter the supply chain.

Capability Calculations for Trace Profiles
Process capability indices quantify whether an etching line maintains trace geometry within customer limits. Cpk measures the distance between the process mean and the nearest specification limit, normalized by three times the standard deviation of the process. When side edge undercut varies due to fluid nozzle clogging or chemical bath exhaustion, the standard deviation of line impedance widens, collapsing Cpk.
Process capability dictates yield.
- Upper specification limit establishes the absolute maximum allowable characteristic impedance prior to guardband deduction.
- Expanded measurement uncertainty quantifies total electrical test error contributed by probes, cables, and reflectometer hardware.
- Process capability Cpk measures etching line statistical stability relative to defined impedance guardband boundaries.
- False acceptance rate predicts the probability of shipping non-compliant panels containing severe localized undercut defects.
Setting guardband thresholds balances yield loss against escape risk. Table 3 illustrates how process capability indices shift as guardband margins expand to account for variable side edge undercut standard deviations.
| Target Z0 (ohms) | Spec Limits (ohms) | Undercut Std Dev (um) | Guardband Deduction (ohms) | Effective Cpk | Estimated Scrap Rate (%) |
|---|---|---|---|---|---|
| 50.0 | +/- 5.0 | 1.5 | 0.5 | 1.67 | 0.01 |
| 50.0 | +/- 5.0 | 2.8 | 1.2 | 1.21 | 0.14 |
| 50.0 | +/- 5.0 | 4.2 | 1.8 | 0.87 | 1.45 |
| 50.0 | +/- 2.5 | 1.5 | 0.5 | 1.11 | 0.26 |
| 50.0 | +/- 2.5 | 2.8 | 1.2 | 0.62 | 6.30 |
| 50.0 | +/- 2.5 | 4.2 | 1.8 | 0.24 | 23.00 |
Tight guardbands increase scrap rates. Setting arbitrary guardbands without accounting for undercut measurement uncertainty leads directly to the unnecessary scrapping of functional circuit panels or the field failure of uninspected high-speed assemblies.

Remedy
Contractual disputes over board impedance batches resolve through agreed acceptance standards and microsection referee testing. When TDR screening identifies coupon failures across a production lot, fabricators and buyers must isolate whether the defect stems from bulk material dielectric variation or local side edge undercut anomalies. Quality agreements specify which measurement protocols govern lot release and define financial liabilities for non-conforming shipments.

Microsection Referee Standards and Verification
Physical cross-sectioning serves as the conclusive referee method when electrical time domain reflectometry readings fall into disputed guardband zones. Microsections verify physical dimensions. Optical or scanning electron microscopy measures the top trace width, bottom trace width, copper thickness, and dielectric distance directly.
Comparing microscopic physical dimensions against 2D field solver calculations determines whether an impedance out-of-spec condition originates from chemical undercut excessive erosion or substrate dielectric thickness errors.
IPC-6012 Class 3 performance standards mandate rigorous microsection structural verification for high-reliability electronics. If a TDR test report indicates a 56.5-ohm reading on a 50-ohm line, a microsection coupon harvested adjacent to the test trace provides the physical proof required to enforce contractual quality clauses. If the microsection demonstrates that the bottom width matches the design specification while the top width shows extreme undercut, the root cause isolates to the etching line, establishing clear vendor liability under standard fabrication contracts.

Commercial Reconciliation and Lot Release
Purchase orders referencing IPC-6012 Class 3 enforce specific electrical test coverage and microsection verification criteria before final payment. A batch that fails electrical impedance testing due to uncalibrated side edge undercut cannot be released without an engineering change waiver signed by the buyer. When non-conforming lots reach an assembly plant, containment cost calculations include de-soldering, board scrap, production line downtime, and emergency re-fabrication freight charges.
Documentation included within the technical shipment dossier must tie TDR test coupon data back to physical panel positions. The dossier requires real-time etch line chemical logging records, microsection optical photographs with calibrated scale overlays, raw TDR trace data files in digital format, and instrument calibration certificates. Final lot acceptance requires proof.
Without this complete technical file, buyers maintain the contractual right to reject entire delivery batches based on coupon TDR failures, shifting financial liability for material scrap back to the circuit board manufacturer.
Standard IPC-6012E Clause 3.6.2.2 dictates that characteristic impedance requirements override nominal trace geometry tolerances, establishing electrical reflection compliance as the sole governing criterion for lot release.



