Integrating IEEE 1149.1 Boundary Scan with Flying Probe Target Vectors
Integrating IEEE 1149.1 boundary scan with flying probe target vectors maximizes fault coverage on high-density PCBs while slashing test times and fixture costs.
AC-Coupled Nets
Capacitive Isolation
Circuit pathways interrupted by series capacitors block direct current while allowing high-frequency signal transmission. In high-speed board layouts, ac-coupled nets ensure that differing DC operating voltages on transmitter and receiver chips do not interfere with one another. The series capacitor creates a physical break for direct current, which stops DC fault propagation but introduces a challenge for standard electrical in-circuit testing.
High Pass Filtering
Transmission lines that employ series capacitors attenuate low-frequency noise and prevent baseline wander in high-frequency data streams. When high-speed differential signals travel along ac-coupled nets, the capacitive barrier limits the return path loop area and reduces electromagnetic emissions. Circuit designers place these capacitors close to the receiving or transmitting pin to control impedance discontinuities.
Correct positioning minimizes signal reflections that degrade data integrity at multi-gigabit speeds. This component placement must be verified during automated optical inspection because a missing capacitor creates an absolute open circuit that blocks all signal transmission.
Boundary Scan Action
Digital boundary scan tests require specialized transceiver configurations to verify the continuity of pathways that contain series capacitors. Standard static pin states cannot pass through the capacitive barrier of ac-coupled nets. To solve this, test platforms inject transition pulses and observe the resulting decay at the receiver pin.
This method isolates open circuits and solder faults without needing direct physical probe access to the traces.