Blind and Buried via Choices That Halve a Supplier List
Specifying staggered microvias and single-press HDI stackups preserves multi-vendor competition while cutting panel scrap costs.
Laser Microvias
Drilling Geometry
Focused light energy removes dielectric and copper material to create vertical interconnects between high density layer pairs in printed circuit boards. Laser microvias establish a permanent conductive path through ablation, providing a connection that replaces mechanical drills for small diameter holes. These features facilitate signal routing in complex multilayer stacks by occupying minimal surface area on outer layers.
Precise power settings prevent excessive thermal damage to surrounding glass fibres while ensuring a clean hole wall profile for plating. Proper beam management during the ablation sequence dictates the reliability of the copper barrel deposition. The resulting interconnect supports high frequency data transmission by reducing parasitic inductance associated with long through hole structures.
Plating Integrity
Achieving a copper void free connection demands attention to the aspect ratio of the hole itself. Laser microvias present a narrow aperture that restricts fluid flow during chemical deposition stages. Solutions require specific agitation cycles or vacuum assistance to displace trapped air within the barrel.
Variations in the thermal expansion coefficient between the resin dielectric and the copper plating create tension that threatens the bond strength at the hole base. Inspection through cross sectioning identifies potential corner cracking or separation from the capture pad after thermal cycling stress. Excess residue left from the ablation stage acts as a contaminant that prevents complete metal coverage on the base.
Cleanliness protocols ensure the metallic deposit adheres to the substrate surface across the entire interconnect length. Automated optical inspection captures surface deviations before lamination stages seal the structure for subsequent processing.
Design Constraints
Printed circuit boards rely on specific positional tolerances to align these openings with underlying landing pads. Offset conditions during drilling produce partial exposure of the base material that complicates subsequent solder mask application and metal etching. Engineers define the minimum diameter based on the limitations of the light source and the thickness of the dielectric layer.
Failure to maintain the required pitch results in short circuits during high volume manufacturing runs. Correct orientation of the beam perpendicular to the panel surface minimizes taper effects that complicate the plating process. Successful implementation of this interconnect architecture dictates the overall density limit of the final hardware product.