Quantifying Laminate Resin Anisotropy Dispersion and Phase Skew Limits in Gigabit Interconnects
Managing anisotropic permittivity and glass weave dispersion prevents timing jitter and intra-pair phase skew in gigabit differential interconnects.
PCIe 6.0 Routing
Signal Layout
High-frequency printed circuit board design must accommodate sixty-four gigatransfers per second using pulse amplitude modulation with four voltage levels. Implementing pcie 6.0 routing requires minimizing trace lengths and eliminating via stubs to prevent severe signal degradation. Because the signal-to-noise ratio is lower than in previous generations, every impedance mismatch must be avoided.
The layout rules apply to the physical traces connecting the processor to the peripheral slots or onboard controllers.
Trace Geometry
Differential pairs must maintain a constant trace width and spacing to avoid impedance variations. Fabricators use low-loss laminates and smooth copper foil to reduce dielectric and conductor losses at the thirty-two gigahertz Nyquist frequency. Micro-via technology and backdrilling are necessary to remove the unused portions of plated through-holes that would otherwise act as open-circuited stubs.
These physical constraints demand precise registration between layers during board lamination.
Crosstalk Mitigation
Electromagnetic coupling between adjacent transmission lines must be minimized to preserve the integrity of the multi-level signals. Increasing the routing spacing between differential pairs to at least three times the trace width is the primary method to control this coupling. Designers also use ground-plane shielding and coplanar waveguide structures to isolate sensitive high-speed lanes.
These techniques are especially important because the four-level signaling scheme of the current generation has a much smaller noise margin than older binary schemes. Automated optical inspection and time-domain reflectometry tests verify the trace dimensions and impedance tolerances of the completed boards before component assembly begins.