Certification Record
Comprehensive documentation of electrical integrity tests performed on an unpopulated printed circuit board acts as the primary evidence of fabrication quality. The bare board test dossier contains netlist comparison results and isolation resistance measurements. It confirms that the physical copper traces match the original design files provided by the customer.
Every high-density interconnect board requires this collection of data to prove the absence of shorts or opens before assembly begins.
Verification Log
Automated optical inspection reports and netlist test logs form the core of the submission package. Within the bare board test dossier, the manufacturer includes the fault map and the repair log for any rework permitted under IPC standards. Continuity testing at 10 ohms and isolation testing at 100 megohms provide the numerical thresholds for acceptance.
Adjacency algorithms determine which nets are tested for shorts based on their physical proximity on the substrate. This rigorous data set allows the assembly house to proceed with confidence that the substrate is electrically sound.
Liability Boundary
Acceptance of the shipment often depends on the completeness of these electrical records. A bare board test dossier stops being an active quality tool once the first component is soldered to the surface. Proof of 100 percent netlist testing remains the only protection for the buyer against manufacturing faults.