Parallel Plate Capacitance Testing for Packaging Core Dielectrics
Parallel plate capacitance testing extracts packaging core permittivity from 100 Hz to 1 GHz by applying guarded electrodes to etched, preconditioned coupons.
Fringing Field
Electromagnetic Distribution
Curved electrostatic flux lines extend beyond the straight-line path between opposing edges of conductor planes in a dielectric medium. This non-uniform distribution of energy is known as a fringing field and is a factor in the electrical behavior of printed circuit boards. It occurs because the electrical charges repel each other, pushing the field lines outward at the termination of the copper electrodes.
In microstrip transmission lines, this field accounts for a substantial portion of the total capacitance, especially when the line width is comparable to the dielectric thickness.
Impedance Modification
Signal trace propagation delay increases when these outer field lines occupy the air above the substrate instead of the underlying laminate. A fringing field lowers the effective dielectric constant of the transmission line, requiring layout designers to adjust their trace width calculations to maintain the desired characteristic impedance. This outward spread of the field also increases the likelihood of electromagnetic interference and crosstalk with adjacent traces or components.
Designers run multi-layer copper shielding and ground-pour barriers to confine these fields and maintain isolation between high-speed signal paths.
Extraction Calculation
Three-dimensional field solvers extract the extra capacitance contributed by these curved lines to ensure accurate board simulation. Simplified formulas fail to capture the behavior of a fringing field at fine-pitch trace spacings.