Parallel Plate Capacitance Testing for Packaging Core Dielectrics
Parallel plate capacitance testing extracts packaging core permittivity from 100 Hz to 1 GHz by applying guarded electrodes to etched, preconditioned coupons.
IPC-TM-650 2.5.5.9
Test Method
Characterization of laminate materials for high-frequency circuit boards requires a uniform protocol to measure relative permittivity and loss tangent at gigahertz frequencies. The standard test procedure designated as IPC-TM-650 2.5.5.9 establishes the guidelines for using a split-post dielectric resonator to determine these properties. This standard provides printed circuit board laminators and designers with a repeatable mechanism to ensure the electrical performance of high-frequency materials is consistent across different manufacturing lots.
Measurement Execution
The procedure requires placing a thin, flat sample of the unclad dielectric material into the gap between two halves of a split-post resonator cavity. This setup measures the resonant frequency and quality factor of the cavity both with and without the sample present. Variations in these measurements are used to calculate the dielectric constant and dissipation factor of the board substrate.
It is critical to maintain clean sample surfaces and controlled environmental conditions, as moisture absorption or grease from handling will alter the test outcomes. The split-post resonator method is highly suited for rapid quality control because it does not require the fabrication of dedicated electrodes or metallized patterns on the test specimen.
Quality Acceptance
Manufacturing facilities run this evaluation to verify that laminate batches comply with the electrical specifications of the purchase order. Circuit boards tested under IPC-TM-650 2.5.5.9 are verified to meet high-frequency signal requirements.