Svensson-Djordjevic Model

Causal Simulation

Incorporating frequency dependence into board simulations prevents the non-physical results that occur when using static material properties. In the time domain, a lack of causality can manifest as a signal appearing at the receiver before it has been sent by the driver. The svensson-djordjevic model solves this by tying the loss and the phase delay together through a physically sound mathematical framework.

This model requires only a few input parameters, such as the dielectric constant and loss tangent at a single reference frequency, to extrapolate the behavior across the entire range. It assumes a constant distribution of relaxation times within the resin and glass matrix, which closely matches the measured performance of most fr-4 variants. By using this approach, designers can accurately predict the rise time degradation and jitter for data rates exceeding ten gigabits per second.

Design Accuracy

Modern simulation tools rely on these algorithms to match the predicted eye diagrams with the actual measurements taken from hardware prototypes. This alignment reduces the number of design iterations needed to meet strict signal specifications.