Mapping High Speed Power Grid Transfer Impedance to Emissions Limits
Mapping high-speed power rail transfer impedance limits directly to radiated emissions limits prevents costly EMC chamber re-tests and batch rejections.
Plane Resonance
Signal Distortion
Electromagnetic wave reflections occurring between parallel power and ground sheets on a printed circuit board generate high-impedance peaks at specific high frequencies. This condition, known as plane resonance, arises when the dimensions of the board correspond to fractions of the electrical signal wavelength. At these resonant frequencies, the power distribution network fails to maintain a low impedance, which leads to voltage fluctuations and increased electromagnetic emissions.
The resulting electrical noise can distort high-speed digital signals traveling on nearby copper traces.
Decoupling Strategy
Placing decoupling capacitors of varying values across the board surface is the standard approach to suppress these high-frequency impedance peaks. For a system affected by plane resonance, engineers select and position capacitors to provide low-impedance paths that short out the resonant energy. These components are placed close to the active semiconductor devices to minimize loop inductance.
Without this mitigation, the resonant energy propagates across the entire board, which causes adjacent signal lines to pick up unwanted noise.
Noise Reduction
Strategic stackup design and the introduction of lossy dielectric materials represent alternative physical methods to reduce the amplitude of these voltage standing waves. By narrowing the dielectric thickness between the power and ground layers, designers can increase the plane capacitance and shift the plane resonance to higher, less problematic frequencies. Incorporating embedded capacitance layers also increases high-frequency attenuation across the frequency band.
These structural adjustments ensure that the circuit remains electrically stable during high-speed switching events, preventing transmission errors. The implementation of thin dielectrics is particularly effective in high-speed digital design because it decreases the characteristic loop inductance of the planes, which suppresses the resonant behavior of the metal sheets.