Integrating IEEE 1149.1 Boundary Scan with Flying Probe Target Vectors
Integrating IEEE 1149.1 boundary scan with flying probe target vectors maximizes fault coverage on high-density PCBs while slashing test times and fixture costs.
SVF
Format Standardization
An ASCII text file format containing the instructions and boundary scan patterns necessary to program and test complex printed circuit boards is a common tool in board manufacturing. Known as svf, this format is used by automated test equipment to execute boundary scan commands and verify board connectivity.
Vector Programming
The file uses simple instructions like SDR and SIR to load values into the shift registers of JTAG-compliant devices. These boundary scan vectors are executed by the tester to toggle internal chip pins and verify that the copper traces between devices are intact. By outputting the test vectors in svf format, the board designer can easily hand off the test suite to the manufacturing floor.
This file acts as a universal language between design tools and board test stations, ensuring that there are no translation errors during transition.
Diagnostic Execution
Using these text-based test sequences allows the boundary scan tester to locate open circuits and shorts without needing physical access to the net. If a test fails, the tester software parses the results to identify the specific pin that did not output the expected voltage. This diagnostic method saves hours of manual troubleshooting on the factory floor.
It also supports fast updates since modifying the svf file does not require altering the hardware fixture.