High Shear Squeeze Flow Analysis in Microvia Substrate Lamination
High shear squeeze flow during substrate lamination forces shear thinning in prepreg resin, enabling complete microvia cavity fill before gelation locks the network.
Blind Microvia
Interconnect Architecture
A high-density circuit path connects the outer layer of a printed circuit board to one or more inner layers without penetrating the entire substrate. By terminating before it reaches the opposite surface, the blind microvia saves valuable routing space on the unpenetrated layers. The configuration allows board designers to place components directly beneath the via on the opposite side of the board.
The structure is essential for routing fine-pitch ball grid arrays in compact consumer electronics.
Laser Drilling
Manufacturing these small connections involves using controlled-depth laser pulses to remove dielectric material before copper plating. Carbon dioxide or ultraviolet lasers vaporize the resin matrix and glass fibers of the outer laminate, stopping precisely at the copper surface of the target inner layer. Residual resin is removed through a chemical desmear process to ensure a clean metal-to-metal contact during the subsequent electroplating step.
The precision drilling requires careful calibration to avoid damaging the target copper landing pad. Any fluctuation in laser energy can result in either an incomplete connection or a burned-through board layer, both of which ruin the board. Automated optical inspection routinely verifies the depth and profile of each hole prior to the plating process.
Reliability Risk
Thermal stress poses the greatest threat to these delicate copper pillars during reflow and subsequent field operation. Differential thermal expansion between the copper plating and the surrounding epoxy-glass matrix generates tensile strain at the base of the via. If the plating is too thin or the desmear step was incomplete, the joint will separate and cause intermittent electrical open circuits.
Testing the joints requires highly sensitive daisy-chain resistance monitoring during thermal cycling.
Empirical Reconciliations between Peripheral Test Coupons and High Density Multilayer Circuitry
Reconciling edge coupon TDR and plating data with interior HDI circuitry demands empirical compensation factors for electroplating current and etch rates.