Plating Inspection
Destructive evaluation of printed circuit board internal structures involves cross sectioning to expose plated through holes for metallographic examination. Microsectioning verification establishes whether barrel wall thickness, copper wrap around, and dielectric spacing satisfy the applicable class requirements for high reliability electronics. Laboratories mount a coupon or extracted board segment in thermosetting resin, grind through the plane of interest using progressively finer abrasives, and polish the exposed face to a mirror finish.
Etching agents reveal grain boundaries and plating stratification under an optical microscope, which exposes defects such as resin voids, nodulation, or barrel cracking that would otherwise remain hidden within the laminate layers.
Thermal Stress
Exposure to elevated temperatures subjects the prepared sample to simulated assembly conditions before final evaluation. Molten solder immersion tests the integrity of interconnections by imposing severe thermal shock upon the barrel and copper foil. Differential thermal expansion between the epoxy glass substrate and the copper plating generates high tensile stress along the z axis during this procedure.
Subsequent microsectioning reveals whether the internal joints withstand the resulting strain without undergoing barrel fatigue, inner layer separation, or plating pull away.
Acceptance Criteria
Evaluation standards dictate the minimum acceptable measurements for copper thickness, etchback, and dielectric spacing on the polished coupon. Inspectors compare optical micrometer readings against established drawing tolerances to confirm that manufacturing processes remain in statistical control. Plating anomalies exceeding specified dimensional limits trigger rejection of the entire production lot because internal defects cannot be detected through exterior electrical testing alone.
Quantitative analysis of the polished interface provides the definitive record of structural compliance for delivered hardware.