sentiention™

Firm

sentiention™ is a sourcing and venture practice run from the European front and executed on the ground in Asia. Its founder, Pierre Blanquett, spent fifteen years on both sides of the table, eight of them in Shanghai and two in Guangzhou: half as a corporate buyer for BMW, Nielsen, Kantar and NetEase, half building the operator setup that supplies brands like them. The firm is registered in Lüneburg and sources materials and electronics, enters markets and builds ventures for its clients, and it runs its own ventures, Nordling Outdoor and TerraLinen among them, on the same system. The buyer-side eye stays.

Record

Expertise is a utility, not a secret. sentiention™ publishes its working knowledge as open reference, and this platform is the standing record of one field, Circuit, read across Board, Assembly and Test. It is written for the buyer, the founder or the product owner who has to decide, so every entry starts from the vocabulary that reader actually meets, landed cost, certification, tolerance, lead time, and works toward a decision that can be acted on. Where the firm has a number it names it and does not explain it: a China entry takes 18 to 24 months, and three days as a visitor beat three weeks at a desk.

Method

The record is written the way the firm works, from public sources and from its own sourcing work, with LLM assistance in the drafting, and it is held to the rule the firm applies to a quote: name the number, never invent one. An entry says what can be verified and adds nothing to sound specific, and where the firm does not know, the entry says less rather than more. Every entry is published to be checked, not believed: where a number, a rule or a standard decides a purchase, verify it against the current text and your own audit before committing volume.

Correction

A record that cannot be corrected is not a record. An entry found wrong is corrected in the entry itself, not defended and not annotated beside. Say so through the intake, naming the entry and the line, and the same 24 hours apply.

Intake

Reading the record asks nothing of the reader. When a project is live there is one intake, at sentiention.com, and this platform hosts no form of its own. Send the brief: what is being sourced or built, the volume, the market and the date it has to exist by. A person answers inside 24 hours, and the first answer is a scoping, not a pitch.

TO 247 packaged power semiconductors stand beside rigid metal conduit tubing mounted on an industrial surface alongside painted structural blocks.

Copper Thieving Melt Rheology Squeeze Flow Lubrication

Predictive Hydrodynamic Modeling of High-Viscosity Epoxy Flow in Ultra-Heavy Copper Cavities

Predictive non-Newtonian flow modeling prevents micro-voiding in ultra-heavy copper cavities by matching prepreg viscosity minimums to press force ramps.

A specialized heavy duty vacuum chamber with metallic panels and thick grey conduits stands recessed within a concrete floor in an industrial production facility.

Planar Permeability Tensor IPC-6012 Class 3 Prepreg Rheology

Non Newtonian Squeeze Flow Dynamics and Anisotropic Glass Weave Permeability under Non Isothermal Lamination Conditions

Non-isothermal squeeze flow and anisotropic permeability dictate prepreg filling, requiring precise press ramps to prevent dielectric micro-voiding.

A metallic thermal heat sink attaches to a printed circuit board module while precision manual assembly tools rest on the workspace surface nearby.

Dynamic Viscosity Stackup Optimization Micro-Voids

Quantifying Microscale Clearance Filling and Dynamic Viscosity in Multilayer PCB Lamination

Dynamic viscosity minimums and hydraulic press profiles dictate complete microscale clearance filling, preventing latent internal voids and panel scrap.

A photorealistic render displays modular industrial equipment designed for electronics manufacturing, featuring interconnected components within a controlled environment.

Flexure Fatigue Testing Defect Escape Rate Defect Density Calculations

Quantifying Micro-Voiding and Flex Crack Failure Escape Rates in High-Density AC-Coupled SerDes Interconnect Channels

Escape rate analysis for high-speed SerDes requires combined AC boundary scan and high-frequency TDR screening to capture micro-voids and flex micro-cracks.

A toroidal inductor and a sample of white paste sit on a glass slide, positioned on a laboratory bench.

Dielectric Constant Groisse Roughness Model Phase Delay Skew

Calibrating Wideband Anisotropic Permittivity and Interfacial Scattering in Sputtered Hydrophobic Polyimide Stackups

Decoupling tensor permittivity from interfacial scattering requires multiline TRL calibration and broadband power spectral density modeling up to 110 GHz.

A molded electronic component housing sits on a microscope stage directly beneath the metal objective lenses for high magnification inspection.

Thermal Expansion Mismatch High-Speed Serial Interconnect 0201 Package Strain

AC Coupling Capacitor Solder Joint Failure Modes in Serial Interconnect Nets

AC coupling capacitor solder joint failures require AC boundary scan and TDR screening to detect latent mechanical microcracks before field deployment.

A digital render presents grey industrial electronics production machinery featuring a modular assembly rail and an open cabinet containing structured internal wiring harnesses.

Micro-Split Cavity Spatial Resolution Mutual Inductance

Predicting Sub-Gigahertz Magnetic Near-Field Leakage across Micro-Split Cavities in High Density Interconnect Layers

Predicting sub-GHz H-field leakage across HDI splits requires calculating slot return loop inductance and applying near-field dipole transformation limits.

A gloved hand presses a diagnostic test probe into an electronic instrument resting on a grey workbench surface.

Fluoropolymer Nano-Coating Print Height Variation Malcom Viscometer

Solder Paste Viscosity and Area Ratio Print Performance

Matching paste particle size and viscosity to stencil area ratio maintains stable transfer efficiency above 80 percent on fine-pitch components.

Anti static gloves support an antistatic shielding bag filled with electronic connectors on a workbench inside a component warehouse.

Multi Function Machine Vacuum Sensor Threshold Fiducial Alignment

Standard SMT Placement Rate Verification against Real PCB Assembly Throughput

Real PCB assembly throughput averages forty to sixty percent of IPC-9850 placement rates due to board transfer, vision checks, and component variation.

A 3D render portrays stacked electronic test fixtures featuring gold spring pins mounted on circuit boards inside storage trays.

CISPR 32 Class B Two Port Impedance Measurement Radiated Emissions

Electromagnetic Field Suppression in Multilayer Printed Circuit Power Plane Stackups

Thin dielectric power plane pairs suppress high frequency cavity modes and radiated emissions by lowering target impedance and shifting resonant frequencies.

A precision electronic assembly fixture sits upon a workbench, featuring a hinged upright component with etched circuitry patterns and a central circular bearing.

Panel Utilization Moisture Absorption IPC-TM-650

Characterizing Dielectric Loss in Adhesiveless Polyimide Substrates

Adhesiveless polyimide substrates eliminate high-loss acrylic adhesives, dropping dielectric loss tangents to 0.002 at 10 GHz when paired with smooth rolled copper.

Two identical hybrid microelectronic subassemblies with soldered axial resistors lie on a striped metallic background in a digital illustration.

Thermal Expansion Interfacial Shear Stress Thermal Shock Testing

Quantifying Thermomechanical Shear Stress Distribution across Non Uniform Copper Density Distributions in Sequential Lamination Stackups

Copper density gradients across sequential lamination stackups drive severe shear stress during reflow, requiring thieving and balance rules to protect yield.

Flexible and rigid electrical conduits route diverse insulated and bare copper wires across an industrial machine and control panel.

Zinc Oxide Film Acoustic Impedance Phase Inversion

High Frequency Acoustic Transducer Attenuation Limits for Sub-Ten Micron Multi-Die Interfacial Delamination Quantification

Sub-ten micron die delamination quantification requires transducers above 200 MHz, balancing 5-micron spatial resolution against material acoustic attenuation.

A single liquid droplet clings to a thin metal wire stretched horizontally between a spooling mechanism and a laboratory fixture.

C-Scan Imaging MSL 3 Preconditioning Flip-Chip Underfill Voiding

Scanning Acoustic Microscopy Echo Phase Inversion for Package Failure Analysis

Acoustic phase inversion identifies package delamination by tracking 180-degree echo phase shifts caused by air gap impedance drop at internal material boundaries.

A small circuit board assembly with header pins is immersed in a solder pot containing molten solder on an electronics workbench.

Pad Land Area Ipc a 610 IPC-9252

In Circuit Test Nodal Access Limits on High Density Microvia Boards

Physical test probe access drops on high-density microvia boards, demanding solder beads or boundary scan to maintain coverage without damaging copper caps.

Precision machined aluminum housing sits beside an electronic substrate featuring visible gold wire bonding in a controlled manufacturing environment.

Thermal Cycling Fine Pitch SMT Boundary Scan IEEE 1149.1

Automated Optical Inspection Yield Gaps in Fine Pitch Printed Assemblies

Fine pitch SMT inspection requires combining 3D optical profilers with boundary scan and automated X-ray gates to catch hidden solder escapes before field deployment.

Render shows a large concentric circular circuit array embedded in stone inside a concrete industrial chamber containing metal pipes and plumbing fixtures.

Ball Grid Array Phase Inversion Moisture Sensitivity Level

BGA Moisture Sensitivity Level Qualification and Inspection Standard

BGA moisture sensitivity compliance demands strict floor life tracking, J-STD-020 preconditioning qualification, and acoustic inspection for subsurface delamination.

Metallic plates and interleaved electronic components in a computer generated render form a vertical stack on a central guide rod within an industrial testing environment.

Thermal Expansion Mismatch Effective Diffusion Thickness Free Volume Theory

Fickian Diffusion Kinetics and Desorption Times for Molded Packages

Fickian desorption calculations use temperature-dependent diffusivity to determine exact package bake times, preventing reflow popcorning and structural delamination.

A circular printed circuit board assembly with intricate concentric traces and a multi-pin connector is presented on a stand.

Cooling Stress Warp Dielectric Layer Thickness Hydrodynamic Drag

Rheological Principles Governing High Frequency Laminate Stackup Lamination

Prepreg viscosity profiles under precise heating rates dictate resin fill, dielectric spacing, and internal layer registration in high frequency stackups.

Machined aluminum placement nozzles and linear feeder modules rest on a dark slate plate flanked by purple guide tracks.

Defect Density Latent Defect Trap False Pass Probability

Predicting Field Defect Escapes from Partial Nodal Access in Complex High Density Assemblies

Partial nodal access models predict field escapes by multiplying baseline DPMO against unprobed structural and functional coverage gaps across dense nets.

A blue plastic tray holding various ceramic capacitors rests inside the steel machinery housing of an automated placement system.

Trace Routing Offset Glass Style 1078 Effective Dielectric Constant

Quantifying Microstrip Phase Delay Variance Driven by Prepreg Glass Yarn Geometry

Prepreg glass bundle spacing causes local permittivity shifts that introduce picosecond phase delay variance in high-speed microstrip traces.

An illuminated display table presents disassembled mechanical frame components alongside printed circuit board assemblies and plastic housings for prototyping.

Laser Ablation Interconnect Stress Testing Coffin-Manson Equation

Modeling Thermomechanical Fatigue Rates in Sub-0.15mm Laser Drilled Target Pad Interfaces

Sub-0.15mm microvia target pad interface fatigue scales nonlinearly with z-axis CTE mismatch and target pad offset, demanding thick base copper and equiaxed plating.

Several concentric metal tubes surround a single ring and a pink bubble wrap pouch on a green inspection mat inside a lab.

Copper Ductility Z-Axis Expansion Thermal Cycling Strain

Interconnect Stress Testing Resistance Drift Correlation with Multilayer PCB Microsections

Interconnect stress testing detects sub-micron post separations through dynamic resistance drift before static optical microsections show physical cracks.

A green rigid-flexible printed circuit board undergoes standardized mechanical stress tests inside a specialized benchtop fixture within a modern assembly lab.

Factory Ambient Humidity Floor Life Limit Reel Level Traceability

SMT Moisture Sensitivity Level Classifications and Floor Life Limits

Component floor life compliance requires strict tracking, verified moisture barrier packaging, and controlled bake protocols before surface reflow.

SMT components on a carrier tape reel and an unpopulated printed circuit board rest on a workbench inside a manufacturing facility.

Microstrain Limit Fixture NRE Cost Strain Gage Verification

Test Point Design Guidelines for Bed of Nails Fixtures

Test point designs require 0.80 mm targets on 1.27 mm pitch with bottom-side placement to maximize fixture alignment and maintain strain under 500 microstrain.

Robotic probes with metallic nozzles position within dark frames before pale blue panels in a clean manufacturing line environment for electronic component processing.

Ramp-to-Spike Voiding under QFN Thermal Sag

Profiling Convective Heat Transfer across Variable Weight Copper Stackups

Profiling variable weight copper stackups requires extended soak dwell and high gas velocity to equalize thermal delta across light pads and heavy ground planes.

A wall mounted mechanical assembly stretches a viscous grey compound between rotating steel plates along a paneled industrial corridor.

Thermal Expansion Glass Transition Temperature Electrodeposited Copper

Quantifying Inner Layer Interconnect Strain during Solder Reflow

Matching dielectric CTE above Tg to copper ductility prevents inner layer interconnect fracture during high temperature reflow thermal profile cycles.

Two gloved hands carefully manipulate a small populated circuit board, possibly during microelectronics assembly or a critical inspection process.

Microvia Reliability Thermal Expansion Traction Separation Law

Modeling Non-Linear Microvia Interface Separation Induced by Viscoelastic Dielectric Cure Strain Fields

Non-linear viscoelastic cure modeling predicts microvia target pad separation by coupling resin shrinkage to interfacial cohesive fracture energy.

A metal storage bin sits between two stacks of printed circuit boards and protective masks on a dark workbench.

Cross Hatched Ground Transmission Line Closed Form Impedance Formulas

Cross Hatched Ground Plane Geometry Optimization for High Frequency Signal Integrity

Cross-hatched ground plane geometry requires balancing mesh pitch, line width, and trace bias angle to prevent impedance elevation and slow-wave phase delay.

A stylized render depicts a central integrated circuit surrounded by numerous organic white modules on a clean test substrate, connected to peripheral electronic components.

Micro-Strain Testing Boundary Scan Coverage Micro-Ohmic Measurement

Hybrid Probing Regimes to Unmask Hidden Ball Grid Array Defects

Combining IEEE 1149.6 boundary scan vectors with deflection-assisted flying Kelvin probes isolates unmasked BGA head-in-pillow defects down to 4.5 micro-ohms.